Architecture of Computing Systems; ARCS 2009 by Mladen Berekovic, Christian Müller-Schloer, Christian

By Mladen Berekovic, Christian Müller-Schloer, Christian Hochberger, Stephan Wong

This ebook constitutes the refereed complaints of the twenty second overseas convention on structure of Computing platforms, ARCS 2009, held in Delft, The Netherlands, in March 2009.
The 21 revised complete papers awarded including three keynote papers have been rigorously reviewed and chosen from fifty seven submissions. This year's distinctive concentration is determined on power expertise. The papers are geared up in topical sections on compilation applied sciences, reconfigurable and functions, great parallel architectures, natural computing, reminiscence architectures, enery understanding, Java processing, and chip-level multiprocessing.

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Figure 2(b) shows the loop unrolling approach, where the innermost loop is completely unrolled and mapped onto a processor element (PE) with 4 MUL and ADD units. In addition to full loop unrolling, one can partially unroll the loop nest for an iteration variable. The unroll factor u denotes how often the loop body is duplicated. In 20 (a) F. Hannig, H. Dutta, and J. Teich (b) no. of taps (j) parallel circuit x time (i) + loop unrolling x x x MUL MUL MUL MUL ADD ADD ADD ADD x + + + (c) processor array PE0 clustering x x + x + x + + PE1 PE2 PE3 MUL MUL MUL MUL ADD ADD ADD ADD Fig.

8] and [9] look into this issue further. Both counting and sampling modes of the performance event counters are tested, and the measured counts are compared with the predicted ones. Statistical error in sampling mode is mentioned in [8], with a brief description of the difference between the counts obtained from sampling results and the real execution counts. No further investigation of the issue is made. In [10] and [11] simulation accuracy is studied. [10] uses Euclidean distance to compare the difference of frequency vectors and calculates the error with the distance between simulated results and real execution, and the variance with the average squared distances.

4 Experiment We perform the experiment on SPEC CPU 2006 [13] benchmarks with various sampling periods. All benchmarks with different input sets in SPEC CPU 2006 have been tested, totally 55 test cases. 1 Test Platform The test platform is a workstation with 2 AMD opteron dual core processors running at 2210 MHz. The size of the system RAM is 2 GB. 2 with -O2 switch. 3, running in 64-bit mode. The kernel is patched with perfmon [4] to interface the performance event counters. 3. pfmon is used to perform the sampling and print out the counts histogram of IP addresses.

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